000 00549nam a2200205Ia 4500
005 20250425162352.0
008 250425s9999 xx 000 0 und d
020 _a0130809829
041 _aeng
082 _a621.392
100 _aYALAMANCHILI, SUDHAKAR
245 0 _aINTRODUCTORY VHDL: FROM SIMULATION TO SYNTHESIS
250 _a1ST ED.
260 _aEstados Unidos
_bPEARSON EDUCACION
_c2001
260 _aUPPER SADDLE RIVER
300 _a401
650 _aVHDL (LENGUAJE DE DESCRIPCIƓN DE HARDWARE)
942 _c01
010 _a66450
999 _c227811
_d227811